Philip Brisk: 2010 Publications

Cave in the Monaco Botanical Gardens                             Cave in the Monaco Botanical Gardens


A. Verma, A. K. Verma, H. Parandeh-Afshar, P. Brisk, and P. Ienne
Synthesis of Floating-point Addition Clusters on FPGAs Using Carry-save Arithmetic
Poster / Short Paper

20th International Conference on Field-Programmable Logic and Applications (FPL)
Milan, Italy, August 31 - September 2, 2010, pp. 19-24
Paper    Poster

P. Brisk, A. K. Verma, and P. Ienne
An Optimal Linear-Time Algorithm for Interprocedural Register Allocation in High-Level Synthesis Using SSA Form
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
29(7):1096-1109, July, 2010

H. Parandeh-Afshar, A. Neogy, P. Brisk, and P. Ienne
Improved Synthesis of Compressor Trees on FPGAs by a Hybrid and Systematic Design Approach
19th International Workshop on Logic and Synthesis (IWLS)
Irvine, CA, USA, June 18-20, 2010, pp. 193-200
Paper    Slides

H. Parandeh-Afshar, A. K. Verma, P. Brisk, and P. Ienne
Improving FPGA Performance for Carry-Save Arithmetic

IEEE Transactions on Very Large Scale Integration Systems (TVLSI)

18(4):578-590, April, 2010

A. K. Verma, P. Brisk, and P. Ienne
Fast, Nearly Optimal ISE Identification with I/O Serialization Through Maximal Clique Enumeration

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)

29(3):341-354, March, 2010

T. Kluter, S. Burri, P. Brisk, E. Charbon, and P. Ienne
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Instruction Set Extensions
Best Paper Nominee

5th International Conference on High-Performance Architectures and Compilers (HiPEAC)

Pisa, Italy, January 25-27, 2010, pp. 126-140

N. Pothineni, P. Brisk, P. Ienne, A. Kumar, and K. Paul
A High-Level Synthesis Flow for Custom Instruction Set Extensions for Application-Specific Processors
15th Asia and South Pacific Design Automation Conference (ASPDAC)
Taipei, Taiwan, January 18-21, 2010, pp. 707-712
Paper    Slides

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